1. Technical Field
The technical field relates to a signal processing apparatus, a signal processing method, and a signal processing program for converting an original image to an image having a larger number of pixels.
2. Related Art
In a conventional up-converting technique for converting an original image to an image of a higher definition, i.e. an image having a larger number of pixels, the number of pixels is increased by interpolating the pixels of the original image thus generating new pixels. In the process, various signal processing operations such as an edge-enhancement process are performed to improve the sharpness of the image. A signal processing apparatus of this type is described in, for example, JP-A-2005-354161. FIG. 13 is a block diagram showing a configuration of a conventional signal processing apparatus described in JP-A-2005-354161. With reference to FIG. 13, the interpolation process for the conventional up-converting method is described below. Although an example of the pixel interpolation in a vertical direction is illustrated in JP-A-2005-354161, the description is given of the interpolation process in a horizontal direction for convenience sake.
An image signal sampled is input to an input terminal of an interpolation circuit 80. The interpolation circuit 80 calculates and sequentially outputs interpolation values at positions of ¼ phase and ¾ phase between two pixels sampled. In this way, the number of pixels of an input image is doubled.
An output signal of the interpolation circuit 80 is delayed in each of delay circuits 81 and 82 by the sampling period of the double pixels, i.e. a half time of the sampling period of the original pixel input to the interpolation circuit 80. The input and output of the delay circuit 81 and the output of the delay circuit 82 are multiplied by coefficients −¼, ½ and −¼ in coefficient circuits 83, 84 and 85, respectively. The outputs of the coefficient circuits 83, 84 and 85 are added by an add circuit 86. The delay circuits 81 and 82, the coefficient circuits 83, 84 and 85 and the add circuit 86 compose a high-pass filter to enhance the edge.
A maximum value detection circuit 88 and a minimum value detection circuit 89 detect the input and the output of the delay circuit 81 and the output of the delay circuit 82, i.e. the maximum and minimum values of three successive pixels. The output of the add circuit 87 is output through a control circuit 90. The control circuit 90 clips the output of the add circuit 87 to cause it not to exceed the maximum value of the maximum value detection circuit 88 and not to decrease below the minimum value of the minimum value detection circuit 89.
FIG. 14 is a diagram showing an example of a waveform in each part of the signal processing apparatus shown in FIG. 13. In FIGS. 14(1-a) to 14(2-d), the abscissa represents the horizontal position of an input image, with the interval of dashed lines being ¼ pixel. The ordinate represents the signal level of the pixels, which is normalized in the range of 0 to 1. The pixel values of the input image are input to the signal processing apparatus in the order of raster scan for each sampling period, and therefore, the abscissa may be regarded to represent the signal input/output timing for the signal processing apparatus. In this case, the interval of the vertical dashed lines is ¼ of the sampling period.
First, a description is given to a case in which the original signal waveform is a part of a sinusoidal waveform as shown in FIG. 14(1-a). The input waveform to the signal processing apparatus is obtained by sampling the original signal waveform. This input waveform is shown in FIG. 14(1-b). In this case, the output of the interpolation circuit 80 has a waveform as shown in FIG. 14(1-c). Next, the output of the add circuit 87 which adds the original value to the output of the high-pass filter including the delay circuits 81 and 82, the coefficient circuits 83, 84 and 85 and the add circuit 86 to enhance the edge, is clipped by the control circuit 90 not to be a larger value than the output of the interpolation circuit 80. The inclined portion of the sinusoidal wave, though not clipped by the control circuit 90, has only a small high-frequency component. As a result, the final output waveform shown in FIG. 14(1-d) is substantially equal to the output waveform of the interpolation circuit 80 shown in FIG. 14(1-c).
Next, a description is given to a case in which the original signal waveform is a step waveform as shown in FIG. 14(2-a). The signal which is input to the signal processing apparatus has a waveform as shown in FIG. 14(2-b). In this case, the output of the interpolation circuit 80 has a waveform as shown in FIG. 14(2-c). Next, the output of the add circuit 87 which adds the original value to the output of the high-pass filter including the delay circuits 81 and 82, the coefficient circuits 83, 84 and 85 and the add circuit 86 to enhance the edge, has a value smaller than 0 or larger than 1. In other words, an overshoot occurs. However the signal is clipped by the control circuit 90 and thus the overshoot is reduced, as a result, the final output waveform is the shape as shown in FIG. 14(2-d).
In this case, the rise of the output waveform (FIG. 14(2-d)) with the step waveform input to the signal processing apparatus is steeper than in the case where only the interpolation process is executed by the interpolation circuit 80 (FIG. 14(2-c)) only. As a result, the edge portion is enhanced.
As described above, in the conventional signal processing apparatus shown in FIG. 13, the use of the high-pass filter causes the rise of the step waveform to be sharp and the waveform distortion to be reduced like the overshoot by the clip process for limiting the maximum and minimum values.
In the conventional configuration, however, the up-converted signal contains an overshoot component. Also, the problem is posed that the edge enhancement effect to steepen the rise portion of the step waveform is small.